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? 1998 mos integrated circuit m m m m pd29f008al-x 8m-bit cmos low-voltage flash memory 1m-word by 8-bit extended temperature operation preliminary data sheet the mark ? ? ? ? shows major revised points. document no. m13579ej3v0ds00 (3rd edition) date published september 1998 ns cp (k) printed in japan the information in this document is subject to change without notice. description the m pd29f008al-x is a low-voltage (2.2 to 2.7 v, 2.7 to 3.6 v) flash memory configured as 8,388,608 bits (1,048,576 words 8 bits) in 19 sectors. it is available as a t type in which the boot sector is allocated to the highest address (sector), and a b type in which the boot sector is allocated to the lowest address (sector). the package is a 40-pin plastic tsop (i). features word configuration : 1,048,576 words 8 bits sector configuration : 19 sectors (16 kbytes 1 sector, 8 kbytes 2 sectors, 32 kbytes 1 sector, 64 kbytes 15 sectors) 2 types of sector configuration t type : boot sector allocated to the highest address (sector) b type : boot sector allocated to the lowest address (sector) automatic program unlock bypass program automatic erase chip erase sector erase (sectors can be combined freely) erase suspend / resume program / erase completion detection detection through data polling and toggle bits detection through ry (/by) pin sector protection any sector can be protected any protected sector can be temporary unprotected hardware reset and standby using /reset pin part number operating supply voltage v (max.) access time ns (max.) power supply current (active mode) ma (max.) standby current (cmos level input) m a (max.) m pd29f008al-bx 3.0 +0.6 / C0.3 90, 120 30 5 m pd29f008al-cx 2.4 +0.3 / C0.2 120, 150 extended operating temperature : - 25 to +85 c program / erase time program : 9.0 m s / byte (typ.) sector erase : 1.0 s (typ.) number of program / erase : 100,000 times (min.)
preliminary data sheet 2 m m m m pd29f008al-x ordering information part number access time ns (max.) operating supply voltage v (max.) boot sector package m pd29f008algz-b90tx-ljh 90 2.7 to 3.6 top address (sector) 40-pin plastic tsop (i) m pd29f008algz-b12tx-ljh 120 (t type) (10 20 mm) (normal bent) m pd29f008algz-b90bx-ljh 90 bottom address (sector) m pd29f008algz-b12bx-ljh 120 (b type) m pd29f008algz-b90tx-lkh 90 top address (sector) 40-pin plastic tsop (i) m pd29f008algz-b12tx-lkh 120 (t type) (10 20 mm) (reverse bent) m pd29f008algz-b90bx-lkh 90 bottom address (sector) m pd29f008algz-b12bx-lkh 120 (b type) m pd29f008algz-c12tx-ljh 120 2.2 to 2.7 top address (sector) 40-pin plastic tsop (i) m pd29f008algz-c15tx-ljh 150 (t type) (10 20 mm) (normal bent) m pd29f008algz-c12bx-ljh 120 bottom address (sector) m pd29f008algz-c15bx-ljh 150 (b type) m pd29f008algz-c12tx-lkh 120 top address (sector) 40-pin plastic tsop (i) m pd29f008algz-c15tx-lkh 150 (t type) (10 20 mm) (reverse bent) m pd29f008algz-c12bx-lkh 120 bottom address (sector) m pd29f008algz-c15bx-lkh 150 (b type) remark for address configuration of sectors, see section 2. sector configuration / sector address table .
preliminary data sheet 3 m m m m pd29f008al-x pin configuration (marking side) /xxx indicates active low si gnal. 40-pin plastic tsop (i) (10 20 mm) (normal bent) [ m m m m pd29f008algz- tx-ljh ] [ m m m m pd29f008algz- bx-ljh ] a0 - a19 : address inputs i/o0 - i/o7 : data inputs / outputs /ce : chip enable /we : write enable /oe : output enable /reset : hardware reset input ry (/by) : ready (busy) output v cc : supply voltage gnd : ground nc note : no connection note some signals can be applied because this pin is not internally connected. a16 a15 a14 a13 a12 a11 a9 a8 /we /reset ry(/by) a18 a7 a6 a5 a4 a3 a2 a1 a17 gnd nc a19 a10 i/o7 i/o6 i/o5 i/o4 vcc vcc nc i/o3 i/o2 i/o1 i/o0 /oe gnd /ce a0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 nc
preliminary data sheet 4 m m m m pd29f008al-x 40-pin plastic tsop (i) (10 20 mm) (reverse bent) [ m m m m pd29f008algz- tx-lkh ] [ m m m m pd29f008algz- bx-lkh ] a0 - a19 : address inputs i/o0 - i/o7 : data inputs / outputs /ce : chip enable /we : write enable /oe : output enable /reset : hardware reset input ry (/by) : ready (busy) output v cc : supply voltage gnd : ground nc note : no connection note some signals can be applied because this pin is not internally connected. a17 gnd nc a19 a10 i/o7 i/o6 i/o5 i/o4 vcc vcc nc i/o3 i/o2 i/o1 i/o0 /oe gnd /ce a0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 a16 a15 a14 a13 a12 a11 a9 a8 /we /reset ry(/by) a18 a7 a6 a5 a4 a3 a2 a1 nc
preliminary data sheet 5 m m m m pd29f008al-x block diagram ry (/by) state control command register v cc detector pgm voltage generator chip enable output enable logic x-decoder stb stb data latch input / output buffers i/o0 - i/o7 sector switches erase voltage generator cell matrix y-decoder y-gating timer v cc gnd /reset /we /ce /oe a0 - a19 address latch
preliminary data sheet 6 m m m m pd29f008al-x contents 1. input / output pin function ................................................................................................. ................ 7 2. sector configuration / sector address table ................................................................................. .. 8 3. bus operations .............................................................................................................. .................... 10 3.1 read ....................................................................................................................... ..................................... 10 3.2 write ...................................................................................................................... ...................................... 10 3.3 standby .................................................................................................................... ................................... 10 3.4 output disable ............................................................................................................. .............................. 10 3.5 hardware reset ............................................................................................................. ............................. 11 3.6 sector protect ............................................................................................................. ............................... 11 3.7 temporary sector unprotect ................................................................................................ ................... 13 3.8 read product id code ....................................................................................................... ........................ 13 4. commands .................................................................................................................... ...................... 14 4.1 writing commands ........................................................................................................... ......................... 14 4.2 read / reset ............................................................................................................... ................................ 15 4.3 read product id code ....................................................................................................... ........................ 15 4.4 program .................................................................................................................... .................................. 15 4.5 chip erase ................................................................................................................. ................................. 16 4.6 sector erase ............................................................................................................... ................................ 16 4.7 erase suspend / resume ..................................................................................................... ..................... 17 4.8 unlock bypass ............................................................................................................. ............................. 17 4.8.1 unlock bypass set ........................................................................................................ ................. 17 4.8.2 unlock bypass program .................................................................................................... ............ 17 4.8.3 unlock bypass reset ...................................................................................................... ............... 17 4.9 sector protect (by command input) .......................................................................................... .............. 19 4.10 sector unprotect .......................................................................................................... .............................. 20 5. hardware sequence flags ..................................................................................................... ........... 22 5.1 i/o7 (data polling) ........................................................................................................ .............................. 22 5.2 i/o6 (toggle bit) .......................................................................................................... ............................... 24 5.3 i/o2 (toggle bit ii) ....................................................................................................... ............................... 25 5.4 i/o5 (exceeding timing limits) ............................................................................................. ................... 25 5.5 i/o3 (sector erase timer) .................................................................................................. ........................ 25 5.6 ry (/by) (ready / busy) .................................................................................................... ......................... 26 6. hardware data protection .................................................................................................... ............. 27 6.1 low v cc write inhibit ................................................................................................................ ................. 27 6.2 logical inhibit ............................................................................................................ ................................ 27 6.3 power-up write inhibit ..................................................................................................... ......................... 27 7. electrical characteristics .................................................................................................. ................ 28 8. package drawings ............................................................................................................ ................. 39 9. recommended soldering conditions ............................................................................................ .. 41
preliminary data sheet 7 m m m m pd29f008al-x 1. input / output pin function pin name input / output function a0 - a19 input address input bus a9 input address input pin. if 11.5 to 12.5 v is applied to a9, the chip enters the read product id code mode. in this mode, and input to a0 causes the following codes to be output. a0 = low level : manufacturer code is output. a0 = high level : device code is output. i/o0 - i/o7 input / output data input / output bus. /ce input this pin inputs the signal that activates the chip. when high level, the chip enters the standby mode. /oe input this pin inputs the read operation control signal. when high level, output is disabled. /we input this pin inputs the write operation control signal. when low level, command input is accepted. /reset input this pin inputs hardware reset. when low level, hardware reset is performed. if 11.5 to 12.5 v is applied to /reset, the chip enters the temporary sector unprotect mode. ry (/by) output this pin indicates whether automatic program / erase is currently being executed. it uses open drain connection. low level indicates the busy state during which the device is performing automatic program / erase. high level indicates the device is in the ready state and will accept the next operation. in this case, the device is either in the erase suspend mode or the standby mode. v cc C supply voltage gnd C ground nc C no connection
preliminary data sheet 8 m m m m pd29f008al-x 2. sector configuration / sector address table [ m m m m pd29f008algz- tx ] 16 kbytes 8 kbytes 8 kbytes 32 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes address fffffh fc000h fbfffh fa000h f9fffh f8000h f7fffh f0000h effffh e0000h dffffh d0000h cffffh c0000h bffffh b0000h affffh a0000h 9ffffh 90000h 8ffffh 80000h 7ffffh 70000h 6ffffh 60000h 5ffffh 50000h 4ffffh 40000h 3ffffh 30000h 2ffffh 20000h 1ffffh 10000h 0ffffh 00000h sa17 1111101 a19 a18 a17 a16 a15 a14 a13 sa18 111111 sa15 11110 sa16 1111100 sa14 1110 sa13 1101 sa12 1100 sa11 1011 sa10 1010 sa9 1001 sa8 1000 sa7 0111 sa6 0110 sa5 0101 sa4 0100 sa3 0011 sa2 0010 sa1 0001 sa0 0000 sector address sector address table sector layout
preliminary data sheet 9 m m m m pd29f008al-x [ m m m m pd29f008algz- bx ] 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64k bytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes 64 kbytes address fffffh f0000h effffh e0000h dffffh d0000h cffffh c0000h bffffh b0000h affffh a0000h 9ffffh 90000h 8ffffh 80000h 7ffffh 70000h 6ffffh 60000h 5ffffh 50000h 4ffffh 40000h 3ffffh 30000h 2ffffh 20000h 1ffffh a19 a18 a17 a16 a15 a14 a13 sa18 1111 sa17 1110 sa16 1101 sa15 1100 sa14 1011 sa13 1010 sa12 1001 sa11 1000 sa10 0111 sa9 0110 sa8 0101 sa7 0100 sa6 0011 sa5 0010 sa4 0001 sector address sector address table sector layout 32 kbytes 8 kbytes 8 kbytes 16 kbytes 08000h 07fffh 06000h 05fffh 04000h 03fffh 00000h sa2 0000011 sa3 00001 sa0 000000 sa1 0000010 10000h 0ffffh
preliminary data sheet 10 m m m m pd29f008al-x 3. bus operations the operation modes of this device are described below. table 3-1. bus operation operation /ce /oe /we a9 a6 a1 a0 i/o0 - i/o7 /reset read l l h address input data output h write l h l address input data input h standby h hi-z h output disable l h h hi-z h hardware reset hi-z l sector protect l v id pulse v id lhl h verify sector protect l l h v id l h l code h temporary sector unprotect v id read product manufacturer code l l h v id lll code h id code note device code l l h v id l l h code h note the manufacturer code and device code can also be read by using commands. see section 4.3 read product id code . remark h : v ih , l : v il , : don't care, v id : 12.0 v 0.5 v 3.1 read at power on or reset (hardware reset or reset command), the device is reset to read mode. when the device is in read mode, no command is necessary for reading data. data can be read using the standard microprocessor read cycle. the read mode is maintained until the contents of the command register are changed. 3.2 write command write can be done using the standard microprocessor write timing. the command is written to the command register. the command register has the function to latch the address and data necessary for executing an instruction, and does not take up memory. when an incorrect address or data is written, or addresses and data are written in an incorrect sequence, the device is reset to the read mode. 3.3 standby when no write or read is performed, the device can be placed in standby mode. in this mode, the power consumption is considerably reduced. the device goes into standby mode when the /ce and /reset pins are maintained at v ih . at this time, the supply current can be kept at 5 m a or below by maintaining the /ce and /reset at v cc 0.3 v. 3.4 output disable the output of the device can be disabled by maintaining /oe at v ih , at which time the output goes into high impedance.
preliminary data sheet 11 m m m m pd29f008al-x 3.5 hardware reset the device can be reset to read mode by maintaining the /reset pin at v il at least during the t rp period. while the /reset pin is held at v il , all write and read commands are ignored. moreover, all output pins go into high impedance. at this time, the supply current can be kept at 5 m a or below by maintaining /reset at gnd 0.2 v. when performing reset, the operations in progress are all interrupted. therefore, when reset is performed during program or erase (including erase suspend), the address or sector data become undefined. in this case, after reset is completed, perform the program or erase operation again. 3.6 sector protect the sector protect function enables protection of any sector. protected sectors cannot be programmed or erased, and any combination of up to 19 sectors can be protected. to select the sector protect mode, apply v id to a9 and /oe. moreover, input v il , v ih , and v il to a0, a1, and a6, respectively, input the sector address of the sector to be protected to a13 to a19, and input v il to /ce. sector protection starts at the falling edge of the /we pulse and ends at the rising edge of the same pulse. maintain the sector address at a constant level during the /we pulse interval. to perform sector protect verification, apply v id to a9. also input v il , v ih , and v il to a0, a1, and a6, respectively, and the sector address of the sector to be verified to a13 to a19. the other address pins are don't care (v il is recommended.) when read from the input sector address is performed, the sector protect verification result is output to i/o0. if the verified sector is protected, "1" is output to i/o0. if it is not protected, "0" is output. sector protect enables writing commands by applying v id to /reset. moreover, it is also possible to unprotect the sector with the same method. for details, see section 4.9 sector protect (by command input) , and section 4.10 sector unprotect . figure 3-1. sector protect timing chart note the sector protect verification result is output. 01h : the sector is protected. 00h : the sector is not protected. sax a13 - a19 (input) a0 (input) a1 (input) a6 (input) a9 (input) /oe (input) /we (input) /ce (input) i/o (output) t vlht t vlht t csp t oesp t wpp t vlht t vlht t oe say 01h note v id v ih v id v ih (sector protect) (verify sector protect)
preliminary data sheet 12 m m m m pd29f008al-x figure 3-2. sector protect timing chart start setup sector address a13 to a19 = sa data = 01h? no sector protect complete protect other sector? no yes pulse count = 1 /oe = a9 = v id , /ce = v il , a0 = v il , a1 = v ih , a6 = v il , /reset = v ih add /we pulse wait 100 s /we = v ih , /ce = /oe = v il (a9 is still v id ) read from sector address a13 to a19 = sa, a0 = v il , a1 = v ih , a6 = v il pulse count = 25? fail remove v id from a9, write reset command yes no yes increment pulse count m remove v id from a9, write reset command
preliminary data sheet 13 m m m m pd29f008al-x 3.7 temporary sector unprotect protected sector can be temporary unprotected in order to perform data program and erase. to select the temporary sector unprotect mode, apply v id to /reset. while this mode is selected, program and erase can be performed even for protected sectors. when v id stops being applied to /reset, the sector is again protected. figure 3-3. temporary sector unprotect timing chart 3.8 read product id code the read product id code function enables reading the manufacturer code and device code from the device. this function is used for example to switch the algorithm of the program device according to the device. to select the read product id code mode, apply v id to a9. moreover, input v il to a1 and a6, and input v il to a0 to read the manufacturer code, and v ih to read the device code. other addresses are don't care (v il is recommended.) when read is performed, the code described in table 3-2 is output. the manufacturer code and device code can be read by using a command. in this case, v id need not be applied to a9. see section 4.3 read product id code . table 3-2. product id code product id code inputs code outputs a6 a1 a0 i/o7 i/o6 i/o5 i/o4 i/o3 i/o2 i/o1 i/o0 hex manufacturer code v il v il v il 0001000010h device code -b tx v il v il v ih 001111103eh -b bx v il v il v ih 0011011137h -c tx v il v il v ih 010011104eh -c bx v il v il v ih 0100011147h /reset (input) /we (input) /ce (input) ry (/by) (output) v id v ih t vlht t vlht (program or erase command sequence)
preliminary data sheet 14 m m m m pd29f008al-x 4. commands the commands of this device and the command write method are described below. 4.1 writing commands the write cycle of a standard microprocessor is used for command write. commands are written to the command register. the command register functions to latch addresses and data required for instruction execution, and does not take up memory. when an incorrect address or data is written, or addresses and data are written in an incorrect sequence, the device is reset to the read mode. table 4-1 lists the commands and command sequence. table 4-1. command sequence command sequence bus 1st bus cycle 2nd bus cycle 3rd bus cycle 4th bus cycle 5th bus cycle 6th bus cycle cycles address data address data address data address data address data address data read / reset note 1 1 hf0h CCCCCCCCCC read / reset note 1 3 555h aah 2aah 55h 555h f0h ra rd CCCC read product id code 3 555h aah 2aah 55h 555h 90h ia id CCCC program 4 555h aah 2aah 55h 555h a0h pa pd CCCC chip erase 6 555h aah 2aah 55h 555h 80h 555h aah 2aah 55h 555h 10h sector erase 6 555h aah 2aah 55h 555h 80h 555h aah 2aah 55h sa 30h sector erase suspend note 2 1 hb0h CCCCCCCCCC sector erase resume note 3 1 h 30h CCCCCCCCCC unlock bypass set 3 555h aah 2aah 55h 555h 20h CCCCCC unlock bypass program 2 h a0h pa pd CCCCCCCC unlock bypass reset 2 h 90h h 00h CCCCCCCC notes 1. the device is reset to read mode by either the read or reset command. 2. if b0h is input to any address during sector erase, erase is suspended. 3. if 30h is input to any address during sector erase suspend, erase is resumed. remarks 1. ra : read address. rd : read data. pa : program address. pd : program data. sa : erase address. select the sector to be erased with a combination of a13 to a19. see section 2. sector configuration / sector address table . ia : 00000h (if reading the manufacturer code). : 00001h (if reading the device code). id : 10h (manufacturer code). : 3eh (b t type device code), 4eh (c t type device code) : 37h (b b type device code), 47h (c b type device code) 2. a11 to a19 are don't care except when selecting a program / erase address. 3. for the bus operation, see section 3. bus operation .
preliminary data sheet 15 m m m m pd29f008al-x 4.2 read / reset this command resets the device to the read mode. when the device is in the read mode, no command is necessary for reading data. data read can be performed using the read cycle of a standard microprocessor. the read mode is maintained until the contents of the command register are changed. 4.3 read product id code this command is used to read the manufacturer code or the device code of the device. the manufacturer code (10h) is output by inputting 00000h in the address using the fourth write cycle. the device code is output when 00001h is input. the manufacturer code and device code can be read by selecting the read product id code mode by applying v id to the a9 pin (see section 3.8 read product id code ). however, applying a high voltage to the address pin is not desirable due to system design considerations. using this command allows reading the manufacturer code and device code without applying a high voltage to the pin. 4.4 program this command is used to program data. program is performed in 1-byte units. program can be performed regardless of the address sequence, even if the sector limit is exceeded. however, "0" cannot be changed back into "1" through the program operation. if overwriting "1" to "0" is attempted, the program operation is interrupted and "1" is output to i/o5, or successful program is indicated in data polling, but actually the data is "0" as before. following write by command sequence, the pulse required for program is automatically generated inside the device and program verification is automatically performed, so that control from external is not required. during automatic program, all commands that have been written are ignored. however, automatic program is interrupted when hardware reset is performed. since the programmed data is not guaranteed in this case, reexecute the program command following completion of reset. upon completion of automatic program, the device returns to the read mode. the operation status of automatic program can be determined by using the hardware sequence flags (i/o7, i/o6, ry (/by) pins). see sections 5.1 i/o7 (data polling) , 5.2 i/o6 (toggle bit) , and 5.6 ry (/by) (ready / busy) . figure 4-1. program flow chart start write program command sequence i/o7 = data? yes no data poll from system increment address yes no last address? programing completed
preliminary data sheet 16 m m m m pd29f008al-x 4.5 chip erase this command is used to erase the entire chip. following command sequence write, erase is performed after "0" is written to all memory cells and verification is performed, using the automatic erase function. program before erase and control from external are not required. during automatic erase, all commands that have been written are ignored. however, automatic erase is interrupted by hardware reset. since erase is not guaranteed in this case, execute the chip erase command again after reset is completed. upon completion of automatic erase, the device returns to read mode. the automatic erase operation status can be determined with the hardware sequence flags (i/o7, i/o6, ry (/by) pins). see sections 5.1 i/o7 (data polling), 5.2 i/o6 (toggle bit) , and 5.6 ry (/by) (ready / busy) . 4.6 sector erase this command is used to erase sectors one at a time. following command sequence write, erase is performed after "0" is written to all sectors to be erased and verification is performed, using the automatic erase function. data program before erase and control from external are not required. sector erase timeout starts after command sequence write. during this timeout, sectors to be erased can be added and selected. at this time, write the sector address and data (30h) of the sectors to be erased that have been added. if the selected sectors include both protected sectors and unprotected sectors, only the unprotected sectors will be erased and the protected sectors will be ignored. if a command other than sector erase or erase suspend is input during timeout, the device is reset to the read mode. automatic erase starts upon timeout completion. at this time, erase is started even if the last write cycle is not completed. during automatic erase, all commands other than erase suspend are ignored. however, when hardware reset is performed, erase is interrupted. since sector erase is not guaranteed in this case, reexecute the sector erase command following completion of reset. upon completion of automatic erase, the device returns to the read mode. the operation status of automatic erase can be determined by using the hardware sequence flags (i/o7, i/o6, i/o2, ry (/by) pins). see sections 5.1 i/o7 (data polling) , 5.2 i/o6 (toggle bit) , 5.3 i/o2 (toggle bit ii) , and 5.6 ry (/by) (ready / busy) . figure 4-2. sector / chip erase flow chart start write erase command sequence data = ffh? data poll from system erasure completed yes no
preliminary data sheet 17 m m m m pd29f008al-x figure 4-3. sector / chip erase timing chart note sa is the sector address of the sector to be erased. for chip erase, input 555h. 4.7 erase suspend / resume this command suspends automatic erase. during erase suspend, sectors for which erase is not performed can be written to. suspend can be performed for sector erase (including the timeout period), but it cannot be performed for chip erase and automatic program. suspend can be performed for all sectors for which erase is being performed. following command sequence write, 20 m s are required until automatic erase is suspended. while automatic erase is suspended, any sector for which erase is not being performed can be read and programmed. whether automatic erase is suspended can be determined with the hardware sequence flags (i/o7, i/o6, i/o2 pins). see sections 5.1 i/o7 (data polling) , 5.2 i/o6 (toggle bit) , and 5.3 i/o2 (toggle bit ii) . to resume erase after it has been suspended, write the command (30h) again during erase suspend. 4.8 unlock bypass this device provides an unlock bypass mode to shorten the write time. normally, 2 unlock cycles are required during program. in contrast, with the unlock bypass mode, it is possible to perform program without unlock cycles. in the unlock bypass mode, all commands except unlock bypass program and unlock bypass reset are ignored. 4.8.1 unlock bypass set this command sets the device to the unlock bypass mode. 4.8.2 unlock bypass program this command is used to perform program in the unlock bypass mode. 4.8.3 unlock bypass reset this command is used to quit the unlock bypass mode. when this command is executed, the device returns to the read mode. address (input) /ce (input) /oe (input) /we (input) i/o (input) v cc t ds t dh t ch t cs t wph 555h t wc t as t ah t wp 55h aah 80h aah 55h (10h for chip erase) 30h 2aah 555h 555h 2aah sa note t ghwl t vcs
preliminary data sheet 18 m m m m pd29f008al-x figure 4-4. unlock bypass flow chart start end unlock bypass set address= 555h data = aah address = 2aah data = 55h address = 555h data = 20h address = don't care data = 90h address = don't care data = a0h address = don't care data = 00h address = program address data = program data programming completed last address? unlock bypass program unlock bypass reset no no next address i/o7 = data? data polling yes yes
preliminary data sheet 19 m m m m pd29f008al-x 4.9 sector protect (by command input) this command performs sector protect. by applying v id to /reset and writing 60h to any address, the device enters the sector protect or unprotect mode. sector protect is started by inputting the sector address of the sector to be protected to a13 to a19, inputting v il to a0 and a6, inputting v ih to a1, and writing 60h. after a timeout of 100 m s, sector protect is completed. next, with the sector address input to a13 to a19, the device enters the sector protect verify mode by inputting v il to a0 and a6, v ih to a1, and writing 40h. when read is performed in this state, the sector protect verify result is output to i/o0. if "1" is output to i/o0, the verified sector is protected. if "1" was not output to i/o0, sector protect failed, so perform sector protect again. sector protect can also be performed by inputting v id to a9 and /oe. for details, see section 3.6 sector protect . figure 4-5. sector protect (by command input) start sector protect (unprotect) mode address = don't care data = 60h data = 01h? no sector protect complete protect other sector? remove v id from /reset? write reset command no yes yes pulse count = 1 /reset = v id sector protect a0 = a6 = v il , a1 = v ih , a13 - a19 = sa, data = 60h verify sector protect a0 = a6 = v il , a1 = v ih , a13 - a19 = sa, data = 40h read from sector address a0 = a6 = v il , a1 = v ih , a13 - a19 = sa wait 100 s m wait 4 s m protect sectors? no pulse count = 25? fail remove v id from /reset? write reset command yes no yes increment pulse count temporary sector unprotect mode
preliminary data sheet 20 m m m m pd29f008al-x 4.10 sector unprotect this command performs sector unprotect. sector unprotect is performed for all sectors. unprotect cannot be performed for specific sectors. moreover, all sectors must be protected prior to unprotect. the device enters the sector protect or unprotect mode by applying v id to /reset and writing 60h to any address. if unprotected sectors exist, first perform sector protect for these sectors. to perform sector protect, input the sector address of the sector to be protected to a13 to a19, v il to a0 and a6, and v ih to a1, and write 60h. see section 4.9 sector protect (by command input) . sector unprotect is started by inputting v il to a0, v ih to a1 and a6, and writing 60h with the sector address of the sector to be unprotected input to a13 to a19. following a timeout of 15 ms, sector unprotect is completed. unprotect verification must be performed for each sector. the device enters the sector unprotect mode by inputting the sector address to a13 to a19 and writing 40h, with v il input to a0 and v ih input to a1 and a6. if reading is performed in this state, the sector unprotect verification result is output to i/o0. if the verified sector is unprotected, "0" is output to i/o0. if "0" is not output to i/o0, this means that unprotect failed, so perform sector unprotect again.
preliminary data sheet 21 m m m m pd29f008al-x figure 4-6. sector unprotect flow chart start data = 00h? no sector unprotect completed last sector (n=18)? remove v id from /reset write reset command yes yes yes n = 0, pulse count = 1 /reset = v id sector protect sector unprotect a0 = v il , a1 = a6 = v ih , data = 60h verify sector unprotect a0 = v il , a1 = a6 = v ih , a13-a19 = sa, data = 40h read from sector address a0 = v il , a1 = a6 = v ih , a13-a19 = sa time out 15 ms verify sector protect a0 = a6 = v il , a1 = v ih , a13-a19 = sa, data = 40h read from sector address a0 = a6 = v il , a1 = v ih , a13-a19 = sa n = 0 wait 4 s m data = 01h? last sector (n=18)? no no yes yes all sectors protected? pulse count = 1000? failure remove v id from /reset write reset command no no yes increment pulse next sector address (n=n+1) no next sector address (n=n+1) sector protect address = don't care, data = 60h
preliminary data sheet 22 m m m m pd29f008al-x 5. hardware sequence flags the status of automatic program / erase operations can be determined from the status of the i/o2, i/o3, i/o5, i/o6, i/o7, and ry (/by) pins. table 5-1. hardware sequence flag status i/o7 note1 i/o6 note2 i/o5 note3 i/o3 i/o2 note1 ry (/by) progress program /i/o7 toggle 0 0 1 0 erase 0 toggle 0 1 toggle 0 erase suspend erase suspended sector 1100t oggle 1 non-erase suspended sector data data data data data 1 erase suspend program /i/o7 toggle 0 0 1 0 exceeding time limits program /i/o7 toggle 1 0 1 0 erase 0 toggle 1 1 n/a 0 erase suspend erase suspend program /i/o7 toggle 1 0 n/a 0 notes 1. to read i/o7 or i/o2, a valid address must be input. 2. to read i/o6, any address can be used. 3. for i/o5, "1" is output if the automatic program / erase time exceeds the prescribed number of internal pulses. 5.1 i/o7 (data polling) data polling is a function to determine whether automatic program / erase is currently being performed by using i/o7. data polling is valid from the rise of the last /we in the program / erase command sequence. whether automatic program is currently being executed can be determined by reading from the program destination addresses. when automatic program is in progress, the complement of the data programmed last is output. upon completion of automatic program, the true value of the programmed data, not the complement, is output. if write is performed to an address inside a protected sector, data polling is valid for approximately 1 m s, and then the device is reset to the read mode. whether automatic erase is in progress can be determined by reading from the addresses of the sector being erased. if erase is in progress, "0" is output to i/o7. when automatic erase is completed or suspended, "1" is output to i/o7. during automatic erase, if all the selected sectors are protected, data polling is valid for approximately 100 m s. the device is then reset to the read mode. if the selected sectors include both protected and unprotected sectors, only unprotected sectors are erased, and protected sectors are ignored. upon completion of automatic program / erase, after the data output to i/o7 changes from the complement to the true value, i/o7 changes asynchronously like i/o0 to i/o6 while /oe is maintained at low level.
preliminary data sheet 23 m m m m pd29f008al-x figure 5-1. data polling timing chart note i/o7 = d out : true value of write data (indicates completion of automatic program / erase) figure 5-2. data polling flow chart /ce (input) t oeh t oe t whwh1 or t whwh2 t ce hi-z t ch /oe (input) /we (input) i/o7 (output) /i/o7 hi-z i/o0 - i/o6 (output) status data d out note valid data start read (i/o0 - i/o7) an = valid address i/o7 = data? yes no fail no yes i/o5 = 1? read (i/o0 - i/o7) an = valid address i/o7 = data? pass yes no
preliminary data sheet 24 m m m m pd29f008al-x 5.2 i/o6 (toggle bit) the toggle bit is a function that uses i/o6 to determine whether automatic program / erase is in progress. the toggle bit becomes valid from the rise of the last /we in the program / erase command sequence. during automatic program / erase, i/o6 is toggled when continuous read is performed from any address. upon automatic program / erase completion or suspend, i/o6 stops being toggled and outputs valid data for read. continuous read control is performed with the /oe or /ce pins. if program is performed for addresses inside a protected sector, i/o6 is toggled approximately 2 m s, and then the device is reset to the read mode. moreover, if all the sectors selected at the time of automatic erase are protected, i/o6 is toggled approximately 100 m s, and then the device is reset to the read mode. if the selected sectors include both protected and unprotected sectors, only unprotected sectors are erased, and protected sectors are ignored. in this way, by using i/o6, it is possible to determine whether automatic erase is in progress (or suspended), but to determine which sector is being erased, i/o2 (toggle bit ii) is used. see section 5.3 i/o2 (toggle bit ii) . figure 5-3. toggle bit timing chart note i/o6 stops the toggle (indicates automatic program / erase completion). figure 5-4. toggle bit flow chart start read (i/o0 - i/o7) an = don't care i/o6 = toggle? no no fail yes no i/o5 = 1? read (i/o0 - i/o7) an = don't care i/o6 =toggle? pass yes yes /ce (input) t oeh /we (input) /oe(input) i/o6 (input / output) t oes toggle input data toggle valid data out stop toggling note toggle
preliminary data sheet 25 m m m m pd29f008al-x 5.3 i/o2 (toggle bit ii) toggle bit ii is a function that determines whether automatic erase (or erase suspend) is in progress for a particular sector by using i/o2. i/o2 is toggled when continuous read is performed from addresses in a sector during automatic erase (or erase suspend). either /oe or /ce is used to control continuous read. when write to a sector that is not subject to erase suspend is attempted during erase suspend, read from sectors that are not subject to erase suspend cannot be performed until program is completed. in this case, if continuous read is performed from addresses in sectors that are not subject to erase suspend, "1" is not output to i/o2. in this way, it is possible to determine whether automatic erase (including erase suspend) is in progress for sectors specified using i/o2, but whether the state is erase in progress or erase suspend cannot be determined with i/o2. to determine this, i/o6 (toggle bit) must be used. see section 5.2 i/o6 (toggle bit) . 5.4 i/o5 (exceeding timing limits) if the program / erase time exceeds the prescribed number of pulses during automatic program / erase (exceeding timing limit), "1" is output to i/o5 and automatic program / erase failure is indicated. moreover, if overwriting "0" to "1" is attempted, the device judges data overwrite to be impossible, and "1" is output to i/o5 when the timing limit is exceeded. when this happens, execute command reset. 5.5 i/o3 (sector erase timer) a 50 m s timeout period occurs following write with the sector erase command sequence before automatic erase starts. during this timeout period, "0" is output to i/o3. when automatic erase starts upon completion of the timeout period, "1" is output to i/o3. if sector erase is performed, first confirm whether the device has received a command by using i/o7 (data polling) or i/o6 (toggle bit). then, using i/o3, check whether automatic erase has started. if i/o3 is "0", the timeout period is not over, and so it is possible to add sectors to erase. if i/o3 is "1", automatic erase starts and other commands (except erase suspend) are ignored until erase is completed. if a sector to erase is added during the sector erase timeout period, it is recommended to check i/o3 prior to and following the addition. if i/o3 is "1" following the addition, that addition may not be accepted.
preliminary data sheet 26 m m m m pd29f008al-x 5.6 ry (/by) (ready / busy) the ry (/by) pin is a dedicated output pin used to check whether automatic program / erase is in progress. during automatic program / erase, "0" is output to the ry (/by) pin. if "1" is output, this signifies that the device is either in the read mode (including erase suspend) or standby mode. since the ry (/by) pin is an open-drain output pin, it is possible to connect several ry (/by) pins in series by connecting a pull-up resistor to v cc . figure 5-5. ry (/by) (ready / busy) timing chart /ce (input) /we (input) ry (/by) (output) t busy automatic program or erase rising edge of the last write pulse
preliminary data sheet 27 m m m m pd29f008al-x 6. hardware data protection this device requires two unlock cycles for program / erase command sequence to prevent illegal program / erase. moreover, a hardware data protect function is provided as follows. 6.1 low v cc write inhibit to prevent an illegal write cycle during v cc transition, the command register and program / erase circuit is disabled and all write cycles are ignored while v cc is v lko or lower. write commands are ignored until v cc becomes equal to or greater than v lko . 6.2 logical inhibit the write cycle is inhibited under any of the following conditions : /oe = v il , /ce = v ih , or /we = v ih . to start a write cycle, /ce = v il and /we = v il must be set while /oe = v ih . 6.3 power-up write inhibit even if /we = /ce = v il and /oe = /v ih are satisfied at power-up, no commands are accepted at the rising edge of /we. the device is automatically reset to the read mode at power on.
preliminary data sheet 28 m m m m pd29f008al-x 7. electrical characteristics absolute maximum ratings condition symbol test condition rating unit supply voltage v cc with respect to gnd - 0.5 to + 5.5 v input voltage v i with respect to gnd except gnd, a9, /reset, /oe - 0.5 note 1 to +5.5 note 2 v gnd, a9, /reset, /oe - 0.5 note 1 to +13.5 note 2 output voltage v o with respect to gnd - 0.5 note 1 to v cc +0.5 note 2 v ambient operating temperature t a - 25 to +85 c storage temperature t stg - 65 to +125 c t bias under bias - 25 to +85 notes 1. C2.0 v (min.) (pulse width 20 ns) 2. v cc + 2.0 v (max.) (pulse width 20 ns) caution exposing the device to stress above those listed in absolute maximum rating could cause permanent damage. the device is not meant to be operated under conditions outside the limits described in the operational section of this specification. exposure to absolute maximum rating conditions for extended periods may affect device reliability. capacitance (t a = 25 c, f = 1 mhz) parameter symbol test condition min. typ. max. unit input capacitance c i v in = 0 v 6.0 7.5 pf output capacitance c o v out = 0 v 8.5 12.0 pf recommended operating conditions parameter symbol test condition b90x, b12x c15x, c12x unit min. typ. max. min. typ. max. supply voltage v cc 2.7 3.6 2.2 2.7 v high level input voltage v ih 2.0 v cc +0.3 note 1 0.7 v cc v cc +0.3 note 1 v v id high voltage is applied (a9, /reset, /oe) 11.5 12.5 11.5 12.5 low level input voltage v il - 0.5 note 2 +0.8 - 0.5 note 2 +0.8 v ambient operating temperature t a - 25 +85 C25 +85 c notes 1. v cc + 0.6 v (max.) (pulse width 20 ns) 2. C0.6 v (min.) (pulse width 20 ns)
preliminary data sheet 29 m m m m pd29f008al-x dc characteristics (recommended operating conditions unless otherwise noted) parameter symbol test condition -b90x, -b12x -c12x, -c15x unit min. typ. max. min. typ. max. high level output voltage v oh1 i oh = - 2.0 ma, v cc = v cc (min.) 2.4 0.85 v cc v v oh2 i oh = - 100 m a, v cc = v cc (min.) v cc C0.4 v cc C0.4 low level output voltage v ol i ol = 4.0 ma, v cc = v cc (min.) 0.45 0.45 v input leakage current i li1 v i = gnd to v cc , v cc = v cc (max.) C 1.0 +1.0 C 1.0 +1.0 m a under high voltage i li2 a9, /oe, /reset = 12.5 v 35 35 output leakage current i lo v o = gnd to v cc , v cc = v cc (max.) C 1.0 +1.0 C 1.0 +1.0 m a supply voltage read i cc1 /ce = v il , /oe = v ih , 5 mhz, i out = 0 ma 712 712ma program, erase i cc2 /ce = v il , /oe = v ih 20 30 30 ma standby i cc3 v cc = v cc (max.), /ce = v cc 0.3 v, /reset = v cc 0.3 v, /oe = v il 0.2 5 0.075 5 m a v cc = v cc (max.), /ce = v ih , /reset = v ih , /oe = v il 250 standby, reset i cc4 v cc = v cc (max.), /reset = gnd 0.2 v 0.2 5 0.075 5 m a v cc = v cc (max.), /reset = v il 250 automatic sleep i cc5 v ih = v cc 0.2 v, v il = gnd 0.2 v 0.2 5 0.075 5 m a mode /ce = v il , /oe = v ih 250 low v cc lock-out voltage note v lko 2.3 2.5 1 1.5 v note when v cc is equal to or lower than v lko , the device ignores all write cycles. see section 6.1 low v cc write inhibit .
preliminary data sheet 30 m m m m pd29f008al-x ac characteristics (recommended operating conditions unless otherwise noted) ac test conditions [ m m m m pd29f008al-b x ] input waveform (rise and fall time 5 ns) output waveform [ m m m m pd29f008al-c x ] input waveform (rise and fall time 5 ns) output waveform [ m m m m pd29f008al-b x, c x ] output load remark c l includes capacitance of the probe and jig, and stray capacitances. test points 0 v 3.0 v 1.5 v 1.5 v test points 0 v 3.0 v 1.5 v 1.5 v test points 0 v 2.5 v 1.0 v 1.0 v test points 0 v 2.5 v 1.0 v 1.0 v i/o0 - i/o7 test point 1.3 v 3.3 k w pd29f008al-x m c l = 100 pf
preliminary data sheet 31 m m m m pd29f008al-x read cycle parameter symbol test condition -b90x -b12x -c12x -c15x unit note min. max. min. max. min. max. min. max. read cycle time t rc 90 120 120 150 ns address access time t acc /ce = /oe = v il 90 120 120 150 ns /ce access time t ce /oe = v il 90 120 120 150 ns /oe access time t oe 35 50 50 55 ns output disable time t df 30 30 30 40 ns output hold time t oh 0000ns /reset high time before read t rh 50 50 50 50 ns /reset pin low to read mode t ready 20 20 20 20 m s read cycle timing chart 1 read timing chart 2 address (input) /reset (input) t acc hi-z data output hi-z i/o (output) t rc /ce (input) t rh t oh t oe address (input) /ce (input) /oe (input) /we (input) hi-z data out t oeh t oh t oe t ce t rc t acc t df hi-z i/o (output)
preliminary data sheet 32 m m m m pd29f008al-x write cycle (program / erase) (/we controlled) parameter symbol -b90x -b12x -c12x -c15x unit note min. typ. max. min. typ. max. min. typ. max. min. typ. max. write cycle time t wc 90 120 120 150 ns address setup time t as 0000ns address hold time t ah 45 50 65 65 ns data setup time t ds 45 50 65 65 ns data hold time t dh 0000ns /oe setup time t oes 0000ns /oe hold time read t oeh 0000ns toggle bit, data poling 10 10 10 10 ns read recovery time before write t ghwl 0000ns /ce setup time t cs 0000ns /ce hold time t ch 0000ns write pulse width t wp 35 50 65 65 ns write pulse width high t wph 30 30 35 35 ns programming operation time t whwh1 9999 m s sector erase operation time t whwh2 1111s1 vcc setup time t vcs 50 50 50 50 m s voltage transition time t vlht 4444 m s2 write pulse width during sector protect t wpp 100 100 100 100 m s2 /oe setup time for valid /we t oesp 4444 m s2 /ce setup time for valid /we t csp 4444 m s2 ry (/by) recovery time t rb 0000ns /reset pulse width t rp 500 500 500 500 ns /reset hold time before read t rh 500 500 500 500 ns ry (/by) delay time from /reset low t rrb 20 20 20 20 m s ry (/by) delay time from valid program or erase operation t busy 90 90 90 90 ns notes 1. the preprogramming time prior to the erase operation is not included. 2. sector protect only.
preliminary data sheet 33 m m m m pd29f008al-x write cycle timing chart (/we controlled) remarks 1. this timing chart shows the last two write cycles among the write command sequence's four write cycles, and data polling. 2. pa : write address pd : write data /i/o7 : the output of the complement of the data written to the device. d out : the output of the data written to the device. sector / chip erase timing chart note sa is the sector address to be erased. in the case of chip erase, input 555h. address (input) /ce (input) /oe (input) /we (input) i/o (input / output) t ds t dh t ghwl t cs t wph t whwh1 t wc t as t ah t ch pd /i/o7 d out t oh t oe t ce t rc 555h pa pa a0h (3rd and 4th write cycle) d out t wp (data polling) address (input) /ce (input) /oe (input) /we (input) i/o (input) v cc t ds t dh t ch t cs t wph 555h t wc t as t ah t wp 55h aah 80h aah 55h (10h for chip erase) 30h 2aah 555h 555h 2aah sa note t ghwl t vcs
preliminary data sheet 34 m m m m pd29f008al-x write cycle (program / erase) (/ce controlled) parameter symbol -b90x -b12x -c12x -c15x unit note min. typ. max. min. typ. max. min. typ. max. min. typ. max. write cycle time t wc 90 120 120 150 ns address setup time t as 0000ns address hold time t ah 45 50 65 65 ns data setup time t ds 45 50 65 65 ns data hold time t dh 0000ns /oe setup time t oes 0000ns /oe hold time read t oeh 0000ns toggle bit, data poling 10 10 10 10 ns read recovery time before write t ghwl 0000ns /we setup time t ws 0000ns /we hold time t wh 0000ns write pulse width t cp 35 50 65 65 ns write pulse width high t cph 30 30 35 35 ns programming operation t whwh1 9999 m s sector erase operation t whwh2 1111s1 note 1. the preprogramming time prior to the erase operation is not included.
preliminary data sheet 35 m m m m pd29f008al-x write cycle timing chart (/ce controlled) remarks 1. this timing chart shows the last two write cycles among the write command sequence's four write cycles, and data polling. 2. pa : write address pd : write data /i/o7 : the output of the complement of the data written to the device. d out : the output of the data written to the device. address (input) /ce (input) /ce (input) /we (input) i/o (input / output) t ds t ghel t ws t whwh1 t wc t as t ah pd /i/o7 d out t oh t oe t ce t rc 555h pa pa a0h (3rd and 4th write cycle) d out t wh t dh t cp t cph (data polling)
preliminary data sheet 36 m m m m pd29f008al-x sector protect timing chart remark sax : first sector address say : next sector address note the sector protect verification result is output. 01h : the sector is protected. 00h : the sector is not protected. temporary sector unprotect timing chart sax a13 - a19 (input) a0 (input) a1 (input) a6 (input) a9 (input) /oe (input) /we (input) /ce (input) i/o (output) t vlht t vlht t csp t oesp t wpp t vlht t vlht t oe say 01h note v id v ih v id v ih (sector protect) (verify sector protect) /reset (input) /we (input) /ce (input) ry (/by) (output) v id v ih t vlht t vlht (program or erase command sequence)
preliminary data sheet 37 m m m m pd29f008al-x data polling during automatic program / erase operations timing chart note i/o7 = d out : true value of write data (indicates automatic program / erase completion) toggle bit during automatic program / erase operations timing chart note i/o6 stops toggle (indicates automatic program / erase completion) ry (/by) during write / erase operations timing chart /ce (input) t oeh t oe t whwh1 or t whwh2 t ce hi-z t ch /oe (input) /we (input) i/o7 (output) /i/o7 hi-z i/o0 - i/o6 (output) status data d out note valid data /ce (input) /we (input) ry (/by) (output) t busy automatic program or erase rising edge of the last write pulse /ce (input) t oeh /we (input) /oe(input) i/o6 (input / output) t oes toggle input data toggle valid data out stop toggling note toggle
preliminary data sheet 38 m m m m pd29f008al-x reset / ry (by) timing chart /we (input) /reset (input) ry (/by) (output) t rp t rrb t rb
preliminary data sheet 39 m m m m pd29f008al-x 8. package drawings 40 pin plastic tsop( i ) (10x20) item millimeters inches b c 0.5 (t.p.) 0.020 (t.p.) 0.45 max. 0.018 max. d 0.22?.05 0.009 +0.002 ?.003 g 0.97?.05 0.038 +0.003 ?.002 j 0.8?.1 0.031 +0.005 ?.004 k 0.145?.05 0.006 +0.004 ?.002 l 0.5 0.020 m 0.10 0.004 a 10.0?.1 0.394 +0.004 ?.005 i 18.4?.1 0.724 +0.005 ?.004 p 20.0?.2 0.787 +0.009 ?.008 r3 +5 ? n 0.10 0.004 s40gz-50-ljh1 s 1.2 max. 0.047 max. u 0.6?.15 0.024 +0.006 ?.007 t 0.25 0.010 m b q r k j g d detail of lead end n t s u l c m 3 +5 ? notes 1. controlling dimention millimeter. 2. each lead centerline is located within 0.08 mm (0.003 inch) of its true position (t.p.) at maximum material condition. 3. "a" excludes mold flash. (includes mold flash : 10.4 mm max. <0.410 inch max.>) 1 20 40 21 s a p i s q 0.1?.05 0.004 +0.002 ?.003
preliminary data sheet 40 m m m m pd29f008al-x 40 pin plastic tsop( i ) (10x20) item millimeters inches b c 0.5 (t.p.) 0.020 (t.p.) 0.45 max. 0.018 max. d 0.22?.05 0.009 +0.002 ?.003 g 0.97?.05 0.038 +0.003 ?.002 j 0.8?.1 0.031 +0.005 ?.004 k 0.145?.05 0.006 +0.002 ?.003 l 0.5 0.020 m 0.10 0.004 notes 1. controlling dimention millimeter. a 10.0?.1 0.394 +0.004 ?.005 i 18.4?.1 0.724 +0.005 ?.004 p 20.0?.2 0.787 +0.009 ?.008 r3 +5 ? n 0.10 0.004 s40gz-50-lkh1 s 1.2 max. 0.047 max. u 0.6?.15 0.024 +0.006 ?.007 t 0.25 0.010 m b q r k j g d detail of lead end n t s u l c m 3 +5 ? 2. each lead centerline is located within 0.08 mm (0.003 inch) of its true position (t.p.) at maximum material condition. 3. "a" excludes mold flash. (includes mold flash : 10.4 mm max. <0.410 inch max.>) 40 21 1 20 s a s p i q 0.1?.05 0.004 +0.002 ?.003
preliminary data sheet 41 m m m m pd29f008al-x 9. recommended soldering conditions please consult with our sales offices for soldering conditions of the m pd29f008al-x. type of surface mount device m pd29f008algz-x-ljh : 40-pin plastic tsop (i) (10 20 mm) (normal bent) m pd29f008algz-x-lkh : 40-pin plastic tsop (i) (10 20 mm) (reverse bent)
preliminary data sheet 42 m m m m pd29f008al-x [ memo ]
preliminary data sheet 43 m m m m pd29f008al-x 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos device behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. produc- tion process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed imme-diately after power-on for devices having reset function. notes for cmos devices
m m m m pd29f008al-x [memo] no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec corporation. nec corporation assumes no responsibility for any errors which may appear in this document. nec corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. no license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec corporation or others. while nec corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. to minimize risks of damage or injury to persons or property arising from a defect in an nec semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. nec devices are classified into the following three quality grades: "standard", "special", and "specific". the specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. the recommended applications of a device depend on its quality grade, as indicated below. customers must check the quality grade of each device before using it in a particular application. standard: computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots special: transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) specific: aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. the quality grade of nec devices is "standard" unless otherwise specified in nec's data sheets or data books. if customers intend to use nec devices for applications other than those specified for standard quality grade, they should contact an nec sales representative in advance. anti-radioactive design is not implemented in this product. m4 96. 5

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